The RISC-V Future

There are 3 ways (today) to make compute faster.
1) Smaller Etching (nanometer reduction, moores law)
2) More efficient algorithm / optimized programming
3) Custom Hardware (ASIC’s)

For the last 50 years the chip industry has been chasing faster chips with Moore’s Law by reducing the nanometer scale of chips every 18 months or so by a factor. For the longest time this held, and it means that entire industries are centered around the ‘next generation’ being the same thing, but on smaller etchings, thus proving benefits at the silicone level. This has resulted in an entire industry focused on ‘smaller, better, faster’ and ignoring optimized compute or custom hardware. The problem is, at least for Silicone based chips, Moores Law is dead, and that momentum has stopped dead in it’s tracks. Method 1 is dead. (At least until we switch to some other method like graphene chips, but thats at least a decade or two away)

Think about it, when was the last time you heard a company advertise based on faster chips, or more memory? Lately everything has become an upsell with a focus on ‘experiential’ improvements like ‘better’ cameras or soft glow filters, because the dirty secret is nothing has really changed for hardware in the last ~5 years. Your phone isn’t faster, your computer isn’t better, it’s just incrementally different. The only real big consumer shift we’ve seen in the last 5 years has been the Apple shift from Intel processors to in-house ARM based SoC’s, which did improve their computers. Oh, by the way, thats a perfect example of Method 3, custom hardware designed for a specific application. Now that we’ve hit this wall we will see either software get more efficient (it wont, at least not for a while, what used to be a 8MB game card is now a 500GB download on launch day for games. Electron Apps consume 16gb+ of RAM, software is getting bigger, not smaller), or we will see workload defined silicon chips.

I believe that the near term future is Workload defined silicone chips, that is chips that are custom built for the application need, no extra fluff, ASICS with a purpose. This is where RISC-V comes in, and especially the RISC-V Profiles shine. For those unaware, if you buy an intel chip, you get what you get, no customization, for ARM you get a bit of wiggle room around the edges, but unless you’re Apple with an architectual license (which they’re not handing out anymore) you cannot customize the chip beyond peripherals. RISC-V is a completely open standard, and the reference implimentations can be customized to whatever you need. This means you can easily build a chip that does exactly and only what you want, with no extra fluff. The real benefit here is you can leverage community or company designs, so you dont have to start from scratch.

While this whole ecosystem is still very much nacent, it’s growing incredibly fast. In just 5 years RISC-V has gone from Linux in the 90’s to Linux in the 2010’s. RISC-V is not a replacement for the existing architectures, yet, the software ecosystem just isnt there yet, but it is a perfect time for using it at the peripheral, in datacenter, in workload intensive, in AI, in industrial.

Personally I find this very exciting, and to see the full promise of Open Hardware really come to reality. We’ve had open source software for a long time, but what I see for the next decade is Open Hardware becoming a reality. The ability to design a chip, FPGA test it, run software integration with QEMU, ship the design out as part of a batch process (tiny tapeout or https://open.space), get the chip back and program it with your won design. This is all possible today, and mass adoption starts tomorrow.

Just like we saw with 3d printing, CNC Milling, LaserCutting, and circuit board design there are 4 steps
1) Industrial Process (very expensive, custom use, usually in military / aerospace first) – expert on staff, lots of money
2) Batch processing (Shapeways, Oshpark, Open.Space) – Send off the design, get it back weeks later
3) DIY at Home – usually a desktop version (shapeoko, Bambu Labs, …etc). Takes minutes to Hours
4) As a Service / mainstream use – youtubers selling designs.

Currently for Custom Silicon we’re at step 2, you can send out batch processing for custom chips, but it feels like before 2030 we’ll see a DIY Silicon fab at home, probably in the 50-120nm range, which may sound large, but for custom chips will be just fine. Remember, you dont need a 4Ghz 7nm chip to open your door, or provide a custom random number generator, you can do more with less.

Personally I’m super excited for the next 5 years, we’re going to see a massive shift in how hardware is produced, and the opportunities for both disruption and exponential innovation are incredible. Never has it been a better time to do hardware, because the only things worth doing are the hard things.